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圖4-28顯示了GPCTR0\U門信號的定時要求。圖4-28：。GPCTR0\U門信號定時GPCTR0\U輸出信號此信號僅作為GPCTR0\U輸出引腳上的輸出可用。GPCTR0\U OUT信號反映通用計數(shù)器0的端子計數(shù)（TC）。您有兩個軟件可選輸出選項：TC上的脈沖和TC上的切換輸出極性。輸出極性可由軟件為兩個選項選擇。該輸出在啟動時設(shè)置為高阻抗。圖4-29顯示了GPCTR0\U輸出的定時。圖4-29：。GPCTR0\U OUT信號定時GPCTR0\U UP\U DOWN信號此信號可在DIO6引腳上進行外部輸入，但不能作為輸入/輸出連接器的輸出。當該引腳處于邏輯低位時，通用計數(shù)器0向下計數(shù)，當其處于邏輯高位時，計數(shù)器向上計數(shù)。您可以禁用此輸入，以便軟件控制上下功能，并使DIO6引腳不受限制以供一般使用。上升沿極性下降沿極性t w t w=10 ns小GPCTR0\U源GPCTR0\U OUT GPCTR0\U OUT（在TC上切換輸出）（在TC上脈沖）TC第4章連接信號©National Instruments Corporation 4-33 NI PCI-6110/6111用戶手冊GPCTR1\U源信號任何PFI引腳都可以從外部輸入GPCTR1\U源信號，該信號可作為PFI3/GPCTR1\U源引腳的輸出。作為輸入，GPCTR1\U源配置為邊緣檢測模式。您可以選擇任何PFI引腳作為GPCTR1\U源的源，并為上升沿或下降沿配置極性選擇。作為輸出，GPCTR1\U源監(jiān)視連接到通用計數(shù)器1的實際時鐘，即使源時鐘是由另一個PFI外部生成的。該輸出在啟動時設(shè)置為三態(tài)。圖4-30顯示了GPCTR1\U源的定時要求。圖4-30：。GPCTR1\U源信號定時大允許頻率為20 MHz，小脈沖寬度為10 ns高或低。沒有低頻率限制。除非您選擇一些外部源，否則20 MHz或100 kHz時基通常會生成GPCTR1\U源。GPCTR1\U門信號任何PFI引腳都可以從外部輸入GPCTR1\U門信號，該信號可作為PFI4/GPCTR1\U門引腳的輸出。作為輸入，GPCTR1\U門配置為邊緣檢測模式。您可以選擇任何PFI引腳作為GPCTR1\U門的源，并配置上升沿或下降沿的極性選擇。您可以在各種不同的應用程序中使用門信號來執(zhí)行諸如啟動和停止計數(shù)器、生成中斷、保存計數(shù)器內(nèi)容等操作。

Figure 4-28 shows the timing requirements for the GPCTR0_GATE signal. Figure 4-28. GPCTR0_GATE Signal Timing GPCTR0_OUT Signal This signal is available only as an output on the GPCTR0_OUT pin. The GPCTR0_OUT signal reflects the terminal count (TC) of general-purpose counter 0. You have two software-selectable output options—pulse on TC and toggle output polarity on TC. The output polarity is software-selectable for both options. This output is set to high-impedance at startup. Figure 4-29 shows the timing of GPCTR0_OUT. Figure 4-29. GPCTR0_OUT Signal Timing GPCTR0_UP_DOWN Signal This signal can be externally input on the DIO6 pin and is not available as an output on the I/O connector. The general-purpose counter 0 counts down when this pin is at a logic low and counts up when it is at a logic high. You can disable this input so that software controls the up-down functionality and leaves the DIO6 pin free for general use. Rising-edge polarity Falling-edge polarity t w t w = 10 ns minimum GPCTR0_SOURCE GPCTR0_OUT GPCTR0_OUT (Toggle output on TC) (Pulse on TC) TC Chapter 4 Connecting Signals © National Instruments Corporation 4-33 NI PCI-6110/6111 User Manual GPCTR1_SOURCE Signal Any PFI pin can externally input the GPCTR1_SOURCE signal, which is available as an output on the PFI3/GPCTR1_SOURCE pin. As an input, GPCTR1_SOURCE is configured in the edge-detection mode. You can select any PFI pin as the source for GPCTR1_SOURCE and configure the polarity selection for either rising or falling edge. As an output, GPCTR1_SOURCE monitors the actual clock connected to general-purpose counter 1, even if the source clock is being externally generated by another PFI. This output is set to tri-state at startup. Figure 4-30 shows the timing requirements for GPCTR1_SOURCE. Figure 4-30. GPCTR1_SOURCE Signal Timing The maximum allowed frequency is 20 MHz, with a minimum pulse width of 10 ns high or low. There is no minimum frequency limitation. The 20 MHz or 100 kHz timebase normally generates the GPCTR1_SOURCE unless you select some external source. GPCTR1_GATE Signal Any PFI pin can externally input the GPCTR1_GATE signal, which is available as an output on the PFI4/GPCTR1_GATE pin. As an input, GPCTR1_GATE is configured in edge-detection mode. You can select any PFI pin as the source for GPCTR1_GATE and configure the polarity selection for either rising or falling edge. You can use the gate signal in a variety of different applications to perform such actions as starting and stopping the counter, generating interrupts, saving the counter contents, and so on.